1. Field of the Invention
The present invention relates to an electronic component embedded substrate and a method for manufacturing an electronic component embedded substrate.
2. Description of the Related Art
In order to respond to the trend of light, small, high-speed, multifunctional, and high-performance electronic devices, multilayer substrate technologies to form a plurality of wiring layers on a printed circuit board (PCB) have been developed, and furthermore, technologies to embed an electronic component such as an active device or a passive device in a multilayer substrate also have been developed.
For example, in Patent Document 1, a PCB, which inserts an electronic component in a cavity and consists of a plurality of layers, and a method of manufacturing the same are disclosed.
Meanwhile, one of the important tasks in the field of the multilayer substrate is to allow an embedded electronic component to efficiently transceive signals including a voltage or a current with external circuits or other devices.
Further, recently, as the trend of high-performance electronic components and the trend of small and thin electronic components and electronic component embedded substrates are intensified, improvement of integration of circuit patterns should be essentially accompanied to connect an external terminal of the electronic component to external wiring while embedding the small electronic component in the thinner and narrower substrate.
Meanwhile, as the electronic component embedded substrate becomes thinner, a bending phenomenon of the substrate has emerged as a serious problem. This bending phenomenon is referred to as so-called warpage. As the electronic component embedded substrate is made of various materials having different coefficients of thermal expansion, the warpage is intensified.
In particular, since the properties of the electronic component embedded in the substrate, such as coefficient of thermal expansion (CTE) and modulus, are very different from those of typical substrate materials or wiring materials, the warpage is intensified unless the electronic component is positioned in the center portion of the substrate. Therefore, in the conventional electronic component embedded substrates, a method of reducing the overall warpage by equalizing the properties and thicknesses of a top wiring layer and a bottom wiring layer to allow the warpage on the top of the electronic component and the warpage on the bottom of the electronic component to conflict with each other when forming the wiring layers on the top and bottom of the electronic component has been mainly applied.
The method like this is also disclosed in Patent Document 2. In Patent Document 2, a technology of disposing a capacitor in the center of a core substrate and building up a circuit pattern layer and an insulating layer in both directions is disclosed.
However, generally, in an active device such as an integrated circuit, a plurality of external terminals are provided on one surface, and no or only a small number of external terminals are provided on the other surface.
When the active device is embedded in the substrate, if the structures of the top and bottom of the electronic component, such as properties and thickness, are symmetrical, since unnecessary wirings are meaninglessly disposed, process efficiency is reduced, substrate materials are unnecessarily wasted, and it is not desirable to slimming of the electronic component embedded substrate.